STTP

“Advanced VLSI Design and Applications with hands-on in CADENCE toolset” June 2018
Department of Electronics and Telecommunication Engineering, SAKEC successfully organized an IETE Approved One week STTP on “Advanced VLSI Design and Applications with hands-on in CADENCE toolset” in association with Entuple Technologies from 25th June to 30th June 2018. The Program was inaugurated by Chief Guest and Keynote speaker Dr. V. B. Chandratre, S/O H+, BARC. This STTP included lecture sessions by esteemed speakers from academics and Industry. The core of this STTP was the 3 day Hands-on session on CADENCE tools which was conducted by Entuple Technologies. The hands-on sessions were focused on Custom IC design and ASIC design. The STTP was attended by 47 participants which included faculties and students from various colleges.The STTP was coordinated by Mr. Shridhar R. Sahu, Assistant Professor, Electronics & Telecommunication Engineering Department.
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