|Department of Electronics Engineering organized an ISTE approved one week STTP on “Design Aspects in CMOS Analog Circuits, ASIC and MEMS” from 27th June to 1stJuly 2016. Dr. B. Satyanarayana from TIFR delivered the keynote address on “Frontiers of VLSI Technologies”. Many resource persons from premier research institutes conducted the sessions of the training program. Dr. Jayanta Mukharjee (IITB), Dr. S. S. Rathod (SPIT), Dr. Sangeeta M. Joshi (VIT), Dr. Saurabh Lodha (IITB), Dr. D. V. Bhoir (FRCRCE), Dr. Nisha Sarwade, Dr. Sudhakar Mande (DBIT) were a few to name. The sessions were supported by resource persons from industries who threw light on the industrial practices in this upcoming field of engineering. There were more than 50 participants for the course. A visit to Nanofabrication Lab, IITB was organized as a part of this STTP. We learnt through the feedback that the participants gained immense knowledge on CMOS analog design, fabrication of MEMS, nanodevices, memristor and ASIC design through this STTP.